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bipolar analog integrated circuit m m m m pc8139gr-7jh single chip transceiver silicon mmic for phs ? 1998 document no. p13117ej1v0ds00 (1st edition) date published december 1998 n cp(k) printed in japan preliminary data sheet description the m pc8139gr-7jh is a silicon microwave monolithic ic (simmic) developed as a transceiver for personal handyphone system (phs). this ic is a highly integrated single chip, suitable for phs, including a quadrature modulator, up converter, and agc circuit for adjusting the output level in the transmitter block, a 2nd down converter and rssi circuit in the receiver block, and a transistor for 2nd vco. this low power ic employs necs proprietary bipolar process nesat tm iv (f t = 20 ghz) and also has a built-in power save function, which contributes to lowering power consumption of the rf block. this ic is packaged in a small, thin 30 pin plastic tssop (225 mil). features ? low voltage operation, low current consumption v cc = 2.7 to 4.0 v, i cc = 32.5 ma at transmitter, i cc = 4.8 ma at receiver, 3.2 ma/@v cc = 3 v at 2nd vco block ? lpf is installed to suppress leakage of transmitters local (l01) harmonics. spurious within transmission band (lo1 7, 8): C55 dbc (max.) ? on-chip agc circuit for adjusting the output level: gcr = 20 db (min.) /@f rfout = 1906.55 mhz ? high-performance output level: p rfout = C13 dbm (typ.) /@f rfout = 1906.55 mhz, v i/q = 500 mv p-p (differential phase) error vector magnitude: evm = 1.0% rms (typ.) adjacent channel leak power: p adj = C68 dbc (typ.) /@ d f = 600 khz rssi output dynamic range: 83 db ? cr phase shifter is adopted. application ? digital cordless telephone: phs ? phs application equipment: pda, pc card, etc. ordering information part number package supplying form m pc8139gr-7jh-e1 30-pin plastic tssop (225 mil) embossed tape 16 mm-wide. pin 1 is in pull-out direction. 2.5 kp/reel remark to order evaluation samples, contact your local nec sales office. (part number for sample order: m pc8139gr-7jh) caution this product is an electrostatic sensitive device. the information in this document is subject to change without notice.
preliminary data sheet 2 m m m m pc8139gr-7jh system application example [phs] to demod. rssi out rssi 233.15 mhz or 259.25 mhz 10.8 mhz 2nd lo pll2 lpf bpf pa pll1 2sc5006 1st lo sw sw main ant 90? agc 0? 2nd mix bpf 243.95 mhz or 248.45 mhz 1651.2 to 1674.0 mhz or 1646.7 to 1669.5 mhz 1895.15 to 1917.95 mhz or (1906.5511.4 mhz) 1662.0 to 1684.8 mhz or 1635.9 to 1658.7 mhz saw 1st mix lna att bpf i q (cr) f pc8139gr-7jh m pc8112 m quadrature modulator ic series product list part number function i cc (ma) f lo1in (mhz) f modout (mhz) up converter f rfout (mhz) phase shifter type application field package m pc8101gr 150-mhz quadrature modulator 15 /@2.7 v 100 to 300 50 to 150 external f/f ct-2, etc. m pc8104gr rf up converter + if quadrature modulator 28 /@3.0 v 100 to 400 900 to 1900 multiplier + f/f various digital communica- tions 20 pin ssop (225 mil) m pc8105gr 400-mhz quadrature modulator 16 /@3.0 v 100 to 400 external multiplier + f/f various digital communica- tions 16 pin ssop (225 mil) m pc8110gr 1-ghz direct quadrature modulator 24 /@3.0 v 800 to 1000 direct modulation multiplier + f/f pdc800 mhz, etc. m pc8125gr on-chip agc function rf up converter + if quadrature modulator 36 /@3.0 v 220 to 270 1800 to 2000 multiplier + f/f phs 20 pin ssop (225 mil) m pc8126gr m pc8126k on-chip local premix 1-ghz direct quadrature modulator 35 /@3.0 v 915 to 960 direct modulation multiplier + f/f pdc800 mhz, etc. 28 pin qfn m pc8129gr lo 2 frequency input type if quadrature modulator + rf up converter 28 /@3.0v 200 to 800 100 to 400 800 to 1900 f/f gsm, dcs1800, etc. 20 pin ssop (225 mil) m pc8158k on-chip agc function rf up converter + if quadrature modulator 28 /@3.0 v 100 to 300 800 to 1500 cr pdc800 m/1.5 g 28 pin qfn for an outline of the quadrature modulator ic series, see the application note usage of m pc8101, 8104, 8105, 8125, and 8129 (document number p13251e).
preliminary data sheet 3 m m m m pc8139gr-7jh internal block diagram and pin connections (top view) 1 i 2 ib 3 q 4 qb 5 v cc 1 6 gnd1 7 v cc 2 8 vcoout 9 gnd2 10 vco-e 11 vco-b 12 vco-c 13 v cc 3 14 ifout 15 rssiout tx mixout 30 v cc 6 29 tx mix-loin 28 gnd5 27 tx mix-loinb 26 v cc 5 25 v ps (tx) /v agc 24 v ps (rx) 23 2nd mixin 22 2nd mixinb note 21 2nd mixout 20 v cc 4 19 gnd3 18 ifin2 17 ifin1 16 iq mix. adder 90? phase shifter (cr) lo buff. 2nd vco rssi 2nd if amp lo buff. lpf up con. agc 2nd mix note pin 21 was specified to function as the gnd4 in the initial design sample, however in subsequent design samples and commercial products it functions as the 2nd mixinb.
preliminary data sheet 4 m m m m pc8139gr-7jh absolute maximum ratings parameter symbol condition rating unit power supply voltage v cc pins 5, 7, 12, 13, 19, 25, 29, 30 t a = +25c 4.5 v power save pin voltage v ps pin 23, pin 24, t a = +25c 4.5 v power dissipation p d t a = +80c note tbd mw operating ambient temperature t a C30 to +80 c storage temperature t stg C55 to +150 c pin current of pin 8 i 8 pin 4ma pin current of pin 10 i 10 pin 4ma collector to base voltage in vco v cbo pin 12 ? pin 11 4.5 v collector to emitter voltage in vco v ceo pin 12 ? pin 10 4.5 v emitter to base voltage in vco v ebo pin 10 ? pin 11 3.0 v note when mounted on 50 50 1.6 mm double sided copper clad epoxy glass board recommended operating range parameter symbol condition min. typ. max. unit power supply voltage v cc pins 5, 7, 12, 13, 19, 25, 29, 30 2.7 3.0 4.0 v power save pin voltage v ps pin 23, pin 24 0 C v cc v operating ambient temperature t a C30 +25 +80 c tx up converter output frequency f tx mixout 1800 C 2000 mhz tx up converter lo input frequency f tx mix-loin p tx mix-loin = C10 dbm 1500 C 1800 mhz tx up converter input frequency f tx mixin iq-mod output frequency f modout 2nd vco oscillating frequency (iq-mod lo, 2nd mix lo input frequency) f 2ndvco (f mod loin, f 2ndmix-loin ) 2nd mix input frequency f 2ndmixin 220 C 270 mhz 2nd mix output frequency f 2ndmixout 810.812 mhz 2nd if amplifier input frequency f 2ndifin 2nd if amplifier output frequency f 2ndifout 810.812 mhz i/q input frequency f i/qin v i/qin = 600 mv p-p (max.), double phase dc C 10 mhz tx up converter lo input level p tx mix-loin C15 C10 C5 dbm 2nd mix input level p 2ndmixin C90 C C10 dbm 2nd if amplifier input level p 2ndifin 23 C 108 db m vemf i/q input amplitude v i/qin double phase input i/q (dc) = ib/qb (dc) = v cc /2 C 500 600 mv p-p
preliminary data sheet 5 m m m m pc8139gr-7jh electrical specifications (1) t a = +25c, v cc = 3.0 v, unless otherwise specified, v ps-tx /v agc = 3.0 v, v ps-rx = 3.0 v (high), i/q (dc) = ib/qb (dc) = v cc /2 = 1.5 v, v i/qin = 500 mv p-p (double phase input) , f i/qin = 24 khz, p /4dqpsk modulated wave input transmission rate: 384 kbps, filter roll-off rate : a = 0.5, mod pattern: all zero, f mod loin = 233.15 mhz, p modloin = C7 dbm, f tx mix-loin = 1673.4 mhz, p tx mix-loin = C10 dbm, f tx mixout = 1906.55 mhz + f i/qin parameter symbol condition min. typ. max. unit total characteristics total circuit current (tx + rx + vco) i cc (total) no signal input 33 40.5 49 ma transmitter block total characteristics (quadrature modulator + up converter + agc circuit) total circuit current (tx) i cc (tx-total) no signal input 27 32.5 39.5 ma dark current at power save (tx) i cc (ps) tx-total v ps 0.5 v (low), no signal input C0.15 m a transmitter block (quadrature modulator + up converter + agc circuit) total output level p tx mixout v agc = 3.0 v C17 C13 C dbm local carrier leak lol f modin loin + f tx mix-loin C C40 C30 dbc image rejection (side-band leak) imr C C40 C30 dbc i/q 3rd order inter-modulation distortion im 3 (i/q) C C50 C30 dbc agc circuit gain control range gcr v agc = 3 v ? 1 v 20 35 C db error vector magnitude (vector error) evm mod pattern: pn 9 C 1.0 5 %rms adjacent channel leak power p adj d f = 600 khz, mod pattern: pn 9 C C68 C60 dbc spurious within transmission band 1 pout (7 mod lo) f mod loin = 259.25 mhz f mod loin 7, f mod loin 7 (image) C C65 C55 dbc spurious within transmission band 2 pout (8 mod lo) f mod loin = 233.15 mhz f mod loin 8, f mod loin 8 (image) C C65 C55 dbc rise time t ps-tx (rise) v ps-tx = 0 v ? 3 v C25 m s power saving response time fall time t ps-tx (fall) v ps-tx = 3 v ? 0 v C25 m s i/q input impedance z i/q value between pins i/ib and q/qb C 180 C k w i/q input bias current i i/q value of each pin when v i = v ib = v q = v qb 3.5 7 16 m a power save low note 1 v ps-tx (low) 0C0.5v power save high note 2 v ps-tx (high) 0.9 C v cc v notes 1. power save pin applied voltage in sleep mode 2. power save pin applied voltage in active mode
preliminary data sheet 6 m m m m pc8139gr-7jh electrical specifications (2) t a = +25c, v cc = 3.0 v, unless otherwise specified, v ps = 3.0 v (high), f 2ndmixin = 243.95 mhz, p 2ndmixin = C40 dbm, f 2ndmix-loin = 233.15 mhz, p 2ndmix-loin = C7 dbm, f 2ndmixout = 10.8 mhz, f 2ndifin = 10.8 mhz, p 2ndifin = C15 dbm, f 2ndifout = 10.8 mhz parameter symbol condition min. typ. max. unit receiver block total characteristics total circuit current (rx) i cc (rx-total) no signal input 3.5 4.8 6 ma dark current at power save i cc (ps-rx total) v ps-rx 0.3 v (low), no signal input C0.15 m a rise time t ps-rx (rise) v ps - rx = 0 v ? 3 v C 2 5 m s power save response time fall time t ps-rx (fall) v ps - rx = 3 v ? 0 v C 2 5 m s power save low note 1 v ps-rx (low) 0C0.3 v power save high note 2 v ps-rx (high) 2.5 C v cc v receiver block 1 (2nd down converter) 2nd mix conversion gain cg 2ndmix combining capacitance with sg 6 10 14 db 1-db compression output level p 1db2ndmix C93C db m v input 3rd order intercept point iip3 (2ndmix) f 2ndmixin1 = 243.95 mhz, f 2ndmixin2 = 244.25 mhz C94C db m v 2nd mix noise figure nf 2ndmix at i/o lc matching C 8 C db 2nd mix local leak 1 isl (2ndlo)1 pin 10 input C7-dbm input note 3 C52C db m v 2nd mix local leak 2 isl (2ndlo)2 pin 10 input C7-dbm input note 4 C24C db m v 2nd mix output resistance z 2ndmixout pin 20 C 330 C w receiver block 2 (if amplifier) limiting sensitivity s l C3 db point C 27 32 db m vem f 2nd if amplifier gain g v p 2ndifin = 13 db m vemf C 80 C db 2nd if amplifier phase shift s p p 2ndifin = 63 to 98 db m vemf note 5 C 6 C deg 2nd if amplifier output amplitude v o 10 k w //10 pf note 6 0.5 0.62 0.75 v p-p 2nd if amplifier output rise time t r C1325 ns 2nd if amplifier output fall time t f C1020 ns 2nd if amplifier input resistance r in pin 16, pin 17 C 330 C w 2nd if amplifier input capacitance c in pin 16, pin 17 C tbd C pf 2nd if amplifier output duty ratio v o (duty) C 52 C % 2nd if amplifier output bias level v o (dc) C 1.5 C v notes 1. power save pin applied voltage in sleep mode 2. power save pin applied voltage in active mode 3. leak to 2nd mix output pin (pin 20) of 2nd mix-lo 4. leak to 2nd mix input pin (pin 22) of 2nd mix-lo 5. rbw of network analyzer = 3 hz 6. 10 pf is a value including all capacitance connected to the pins (wiring pattern)
preliminary data sheet 7 m m m m pc8139gr-7jh electrical specifications (3) t a = +25c, v cc = 3.0 v, unless otherwise specified, v ps = 3.0 v (high), f 2ndmixin = 243.95 mhz, p 2ndmixin = C40 dbm, f 2ndmix-loin = 233.15 mhz, p 2ndmix-loin = C7 dbm, f 2ndmixout = 10.8 mhz, f 2ndifin = 10.8 mhz, p 2ndifin = C15 dbm, p 2ndifout = 10.8 mhz parameter symbol condition min. typ. max. unit receiver block 3 (rssi) rssi linearity l r v if = 33 to 98 db m vemf C 1.5 2.0 db rssi slope s r C28Cmv/db rssi intercept i r C4C db m vemf rssi output voltage 1 v r1 v 2ndifin = 33 db m vemf 0.6 0.8 1 v rssi output voltage 2 v r2 v 2ndifin = 63 db m v 1.44 1.68 1.92 v rssi output voltage 3 v r3 v 2ndifin = 98 db m v 2.4 2.7 2.9 v rssi output voltage 4 v r4 no signal input C 0.5 C v rssi output temperature stability s t t a = C30c to +80c C 2.0 C db rssi output dynamic range d r 75 83 C db rssi rise time t rf1 C15 m s rssi fall time t rf2 C15 m s rssi output ripple r r 10 pf note C30C mv p-p rssi output resistance r or 28 35 42 k w note 10 pf is a value including all capacitance (wiring capacitance) connected to the pins electrical specifications (4) t a = +25c, v cc = 3.0 v parameter symbol condition min. typ. max. unit common block (2nd vco) total circuit current (2nd vco) i cc (2ndvco) 3 k w is attached to pin 10 externally (without pull-down resistance for pin 8) 2.5 3.2 3.5 ma 2nd vco output level p 2ndvco pin 8 pull-down resistance is 1 k w C10 C C dbm 2nd vco oscillating frequency f 2ndvco 220 C 270 mhz
preliminary data sheet 8 m m m m pc8139gr-7jh pin functions pin no. symbol applied voltage (v) pin voltage note (v) function and description internal equivalent circuit 1i v cc /2 C input pin for i signal. the input impedance is about 180 k w . 2ib v cc /2 C input pin for ib signal. the input impedance is about 180 k w . single ended input is also possible. in the case of single ended input, input only the dc voltage of vcc/2. 1 2 2.2 k w 470 w 470 w 3q v cc /2 C input pin for q signal. the input impedance is about 180 k w . 4qb v cc /2 C input pin for qb signal. the input impedance is about 180 k w . single ended input is also possible. in the case of single ended input, input only the dc voltage of vcc/2. 3 4 2.2 k w 470 w 470 w 5v cc 1 2.7 to 4.0 C power supply voltage pin for the quadrature modulator block. ?????? 6 gnd1 0 C ground pin for the quadrature modulator block. form as wide a ground pattern as possible to minimize its impedance. ?????? 7v cc 2 2.7 to 4.0 C power supply voltage pin for the vco block. ?????? 8 vcoout C 1.6 oscillator output pin. the output level can be adjusted with an external pull- down resistor. 8 9 gnd2 0 C ground pin for the vco block. form as wide a ground pattern as possible to minimize its impedance. ?????? 10 vco_e C 2.1 emitter pin for oscillator. ground with an external pull-down resistor. it can be oscillated by performing feedback with a resonance circuit mounted externally between this pin and pin 11. 11 vco_b C 2.9 base pin for oscillator. it can be oscillated by performing feedback with a resonance circuit mounted externally between this pin and pin 10. 12 vco_c 2.7 to 4.0 C collector pin for oscillator. open collector. 12 11 10 : external attachment note the pin voltage is measured on vcc=3.0 v.
preliminary data sheet 9 m m m m pc8139gr-7jh pin functions pin no. symbol applied voltage (v) pin voltage note (v) function and description internal equivalent circuit 13 v cc 3 2.7 to 4.0 C supply voltage pin for the if amplifier and rssi block. ?????? 14 ifout C 1.5 output pin for the if amplifier. 14 15 rssiou t C0.5 (no input signal) output pin for the rssi. the output resistance is about 35 k w . 15 35 k w 16 ifin1 C 1.9 input pin for the if amplifier. the input resistance is about 330 w . 17 ifin2 C 1.9 input pin for the if amplifier. the input resistance is about 330 w . 17 16 18 gnd3 0 C ground pin for the if amplifier, rssi block, and 2nd down converter block. form as wide a ground pattern as possible to minimize its impedance. ?????? 19 v cc 4 2.7 to 4.0 C power supply voltage pin for the 2nd down converter block. ?????? 20 2nd mixout C 1.5 output pin for the 2nd down converter. the output resistance is about 330 w . 20 21 2nd mixinb C 1.9 bypass pin for the 2nd down converter block. ground this pin through an external capacitor. 22 2nd mixin C 1.9 input pin for the 2nd down converter. high impedance input. 22 21 : external attachment note the pin voltage is measured on vcc=3.0 v.
preliminary data sheet 10 m m m m pc8139gr-7jh pin functions pin no. symbol applied voltage (v) pin voltage note (v) function and description internal equivalent circuit 23 v ps (rx) 0 to v cc C power save pin for the receiver block (if amplifier, rssi, 2nd down converter). this pin is interlocked to the internal regulator and can control the following. v ps (v) ic stat 2.5 to v cc on (active mode) 0 to 0.3 off (sleep mode) 23 24 v ps (tx) / v agc 0 to v cc C power save pin for the transmitter block (quadrature modulator, up converter, agc circuit). this pin is interlocked to the internal regulator and can control the following. v ps (v) ic stat 0.9 to v cc on (active mode) 0 to 0.5 off (sleep mode) 24 25 v cc 5 2.7 to 4.0 C supply voltage for the agc block. ?????? 26 tx mix- loinb C 2.0 bypass pin for the local input of the up converter. ground this pin through an external capacitor. 28 tx mix- loin C 2.0 local input pin for the up converter. high impedance input. 26 28 27 gnd5 0 C ground pin for the agc and up converter. form as wide a ground pattern as possible to minimize its impedance. ?????? 29 v cc 6 2.7 to 4.0 C supply voltage pin for the up converter block. 30 tx mixout 2.7 to 4.0 C rf output pin for the up converter block. this is an open collector output, so an impedance matching circuit should be attached externally. 29 30 : external attachment note the pin voltage is measured on vcc=3.0 v.
preliminary data sheet 11 m m m m pc8139gr-7jh relation between i/q pin input signal potential and upper limit amplitude input amplitude (mv p-p ) power supply voltage (v) v cc i/q bias voltage (v) v cc /2 = i = ib = q = qb single ended input i = q differential phase input i = ib = q = qb 2.7 1.35 400 600 to to 3.0 1.5 800 600 to to 4.0 2.0 1000 600 comparison of i/q input amplitudes in the same tx output level input amplitude (mv p-p ) power supply voltage (v) v cc i/q bias voltage (v) v cc /2 = i = ib = q = qb single ended input i = q differential phase input i = ib = q = qb reference characteristics tx total output level (dbm) p tx-mixout 2.7 1.35 400 200 C20 3.0 1.5 800 400 C14 4.0 2.0 1200 600 C10.5
preliminary data sheet 12 m m m m pc8139gr-7jh test circuit 1 transmitter block (quadrature modulator + up converter + agc circuit) i 270 180 90 0 ib q qb v cc 1 gnd1 v cc v cc v cc v cc v cc v cc 2 vcoout gnd2 100 pf 33 pf 3 pf 10 nh 1 p 33 pf vco_e vco_b vco_c v cc 3 ifout rssiout tx_mix_out v cc 6 tx_mix_loin gnd5 tx_mix_loinb v cc 5 v ps tx v ps _rx 2nd_mix_in 2nd_mix_inb 2nd_mix_out v cc 4 gnd3 ifin2 ifin1 awg spa sg sg out 1 v ps 100 pf out in
preliminary data sheet 13 m m m m pc8139gr-7jh test circuit 2 transmitter block + common block (quadrature modulator + up converter + agc circuit + 2nd vco) i 270 180 90 0 ib q qb v cc 1 gnd1 v cc v cc v cc v cc v cc v cc 2 vcoout gnd2 3 pf 15 pf 33 nh 3 k w 1 k w 1 pf 10 pf 100 pf 33 pf 10 nh 1 pf 33 pf vco_e vco_b vco_c v cc 3 ifout rssiout tx_mix_out v cc 6 tx_mix_loin gnd5 tx_mix_loinb v cc 5 v ps tx v ps _rx 2nd_mix_in 2nd_mix_inb 2nd_mix_out v cc 4 gnd3 ifin2 ifin1 awg spa sg 1 v ps out in spa in 100 pf 3 pf
preliminary data sheet 14 m m m m pc8139gr-7jh test circuit 3 receiver block (2nd down converter + 2nd if amplifier + rssi) i ib q qb v cc 1 gnd1 v cc v cc v cc 2 vcoout gnd2 100 nf 100 nf 100 nf vco_e vco_b vco_c v cc 3 ifout rssiout tx_mix_out v cc 6 tx_mix_loin gnd5 tx_mix_loinb v cc 5 v ps tx v ps _rx 2nd_mix_in 2nd_mix_inb 2nd_mix_out v cc 4 gnd3 ifin2 ifin1 spa sg sg out sg out v cc 1 v ps out in spa in voltmeter in 1 nf 10 n 51 w 330 w 100 p 100 pf 10 pf 10 p 100 nf 100 pf 10 pf 10 nf 10 nf 1 nf 1 nf 1 nf 100 pf 10 pf 10 pf 10 k w v cc 100 pf
preliminary data sheet 15 m m m m pc8139gr-7jh test circuit 4 receiver block (2nd down converter + 2nd if amplifier + rssi) i ib q qb v cc 1 gnd1 v cc v cc v cc 2 vcoout gnd2 100 nf 100 nf 100 nf vco_e vco_b vco_c v cc 3 ifout rssiout tx_mix_out v cc 6 tx_mix_loin gnd5 tx_mix_loinb v cc 5 v ps tx v ps _rx 2nd_mix_in 2nd_mix_inb 2nd_mix_out v cc 4 gnd3 ifin2 ifin1 sg out sg out voltmeter in v cc 1 v ps spa in 1 nf 51 w 100 p 100 pf 10 pf 10 p 100 nf 10 nf 100 pf 10 pf 10 nf 1 nf 1 nf 100 pf 10 pf 10 pf 10 k w v cc 100 pf
preliminary data sheet 16 m m m m pc8139gr-7jh test circuit total configuration i 270 180 90 0 ib q qb v cc 1 gnd1 v cc c28 c31 c26 c11 c2 c8 c21 c22 c3 c12 c27 bpf1 c19 c20 c10 c24 c23 v ps _tx-v agc v ps _rx sg sg sg c13 c4 c1 c14 c5 c29 c16 c6 c18 c17 c30 c15 c7 c25 r2 r1 v cc v cc 2 vcoout gnd2 vco_e vco_b vco_c v cc 3 ifout rssiout tx_mix_out v cc 6 tx_mix_loin gnd5 tx_mix_loinb v cc 5 v ps tx v ps _rx 2nd_mix_in 2nd_mix_inb 2nd_mix_out v cc 4 gnd3 ifin2 ifin1 awg sg out 1 out out out v cc spa in spa in spa in spa in voltmeter in v cc v cc v cc l1 c32 c9
preliminary data sheet 17 m m m m pc8139gr-7jh example of the test circuit mounted on printed circuit board i in q in qinb c16 c8 c29 c28 1 c14 c5 c3 c27 c12 c3 c24 c2 c11 c1 c7 c17 r1 c18 vcoout vcoin ifout c25 r2 gnd gnd rssiout v cc v ps tx/vagc v ps rx c23 c19 txmixloin txmixout iinb c9 ifin 2 ndmixout 2 ndmixin bpf1 gnd c31 c32 c26 c21 c22 c10 c13 c4 3 1 4 2 c8 center portion on rear side pc8139 m parts list symbol name value model name specifications manufacturer quantity bpf1 bpf cfec10.8 mk1 murata mfg. 1 l1 chip inductor 10 nh tfl0816-10n ssm 1 r2 chip resistor 10 k w rr0816r-103-d ssm 1 r1 chip resistor 51 w rr0816r-510-d ssm 1 c32 chip capacitor 3 pf grm39b030j50pb murata mfg. 1 c26 to 31 chip capacitor 100 nf grm39b104j50pb murata mfg. 6 c23 to 25 chip capacitor 10 nf grm39b103j50pb murata mfg. 3 c19 to 22 chip capacitor 1 nf grm39b102j50pb murata mfg. 4 c10 to 18 chip capacitor 100 pf grm39b101j50pb murata mfg. 8 c8 to 9 chip capacitor 33 pf grm39b330j50pb murata mfg. 2 c2 to 7 chip capacitor 10 pf grm39b100j50pb murata mfg. 7 c1 chip capacitor 1 pf grm39b010j50pb murata mfg. 1 4 pcc pin a2-3pa-2.54dsa hirose electric 2 3 pcc pin a2-1pa-2.54dsa hirose electric 3 2 sma connector 142-0701-881 jhonson 10 1 polyimide substrate r4775 (t0.2) matsushita electric works 1 notes on the board (1) copper patterning on a polyimide board of 76 76 0.2 mm in size. (2) full grounding on rear side. (3) solder coating over patterns. (4) and indicate through holes.
preliminary data sheet 18 m m m m pc8139gr-7jh package dimensions 30-pin plastic tssop (225 mil) (unit: mm) 30 16 1 8.0 max. 4.40.1 1.00.2 6.40.2 0.22 1.25 max. 0.5 0.5 max. 0.50.2 4.4.0.1 0.980.07 0.1250.075 0.1450.055 3 ? detail of lead end 15 0.10 0.05 0.10 m +7 ? 3 ? _ _ +
preliminary data sheet 19 m m m m pc8139gr-7jh cautions on use 1. observe precautions for handling because this ic is an electrostatic sensitive device. 2. form as wide a ground pattern as possible to minimize its impedance. 3. keep the track length of the ground pins as short as possible (to prevent malfunction). 4. connect a bypass capacitor to the vcc pin. recommended soldering conditions this product should be soldered in the following recommended conditions. for soldering methods and conditions other than the recommended conditions, consult an nec sales representative. m m m m pc8139gr-7jh soldering method soldering conditions symbol infrared reflow package peak temperature: 235c. duration: 30 sec. max. (210c or above) number of times: 2, exposure limit: none note ir35-00-2 vps package peak temperature: 215c. duration: 40 sec. max. (200c or above) number of times: 2, exposure limit: none note vp15-00-2 wave soldering soldering bath temperature : 260c max. duration: 10 sec. max. number of times: 1, exposure limit: none note ws60-00-1 partial heating method pin temperature: 300c max. duration: 3 sec. max. (per side of device) exposure limit: none note note storage period (days) after opening the dry pack. storage conditions: 25c and 65% rh or less (this product is not dry packed.) caution do not use different soldering methods together (except for pin partial heating.) for details of recommended soldering conditions, refer to the information document semiconductor device mounting technology manual (c10535e)
m m m m pc8139gr-7jh no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5

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